专利名称：ERROR CONTROLLER发明人：YANO, Tetsuya, c/o FUJITSU
LIMITED,OBUCHI, Kazuhisa, c/o FUJITSULIMITED
申请号：EP03712787.5申请日：20030320公开号：EP1605624B1公开日：20120725
摘要：In an error control apparatus on a receiving side using a hybrid ARQ whichcombines an error correcting encoding method and an automatic repeat requestmethod, a buffer stores hard decision result data or soft output data instead of softdecision information in order to reduce a memory capacity of the buffer, and re-encodesthe data stored to be provided to a combiner. Alternatively, the number of bits of thedata stored in the buffer is restricted or a memory included in a decoder is used as anHARQ buffer.
申请人：FUJITSU LIMITED
代理机构：Gibbs, Christopher Stephen
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