Delay line compensation network

专利名称：Delay line compensation network发明人：Chester M. Nibby, Jr.,Robert B. Johnson申请号：US06/036632申请日：19790507公开号：US04302735A公开日：19811124

摘要：A timing generator circuit includes a pair of multitap cascaded delay lines of likeconstruction. Each delay line includes a plurality of sections each of which are constructedto provide the same increment of delay at each tap. A capacitive element connectsbetween predetermined taps of the two delay lines to form a compensation networkincluding a predetermined section of each delay line. The compensation network whichoperates to cancel out the effects of any mismatch resulting from connecting the delaylines in series.

申请人：HONEYWELL INFORMATION SYSTEMS INC.

代理人：Faith F. Driscoll,Nicholas Prasinos

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